1.
S Bordihn; B Min; R Peibst; R Brendel
Modelling of Passivation and Resistance of n-Type poly-Si Layers by Trained Artificial Neural Networks Proceedings Article
In: WIP, (Hrsg.): Proceedings of the 36th European Photovoltaic Solar Energy Conference and Exhibition, S. 176-179, Marseille, France, 2019, ISBN: 3-936338-60-4.
@inproceedings{Bordihn2019b,
title = {Modelling of Passivation and Resistance of n-Type poly-Si Layers by Trained Artificial Neural Networks},
author = {S Bordihn and B Min and R Peibst and R Brendel},
editor = {WIP},
doi = {10.4229/EUPVSEC20192019-2BO.3.1},
isbn = {3-936338-60-4},
year = {2019},
date = {2019-10-23},
booktitle = {Proceedings of the 36th European Photovoltaic Solar Energy Conference and Exhibition},
pages = {176-179},
address = {Marseille, France},
abstract = {This paper studies the passivation quality and sheet resistance of n-type poly-Si on oxide (POLO) layers that we prepare at various post-deposition annealing temperatures. The n-type poly-Si layers are 50 nm-thin and grown on textured and planar Cz Si substrates. The samples are annealed from 880 °C to 1000 °C to transform the amorphous Si to poly-crystalline Si. The surface passivation quality is evaluated after the aforementioned anneal step, after an additional hydrogenation step (induced by Al2O3 capping layers and subsequent low temperature anneal), and after firing at 840 °C peak temperature. The optimal surface passivation quality is found for annealing at 960 °C and hydrogenation, resulting in iVoc-values of 710 mV. The hydrogenation step improves the iVoc by ~20 mV depending on the post-deposition annealing temperature. We find that surface passivation and sheet resistance of the poly-Si layers increased with increasing anneal temperature up to 960 °C and starts to decline above 980 °C. This trend is found to correlate with the amount of in-diffused dopants that depends also on the annealing temperature. We show that artificial neural network based model can serve as a fast tool for predicting layer properties that depend on multiple process parameters. The quality of the modelling is the same as that using the Design of Experiment method.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
This paper studies the passivation quality and sheet resistance of n-type poly-Si on oxide (POLO) layers that we prepare at various post-deposition annealing temperatures. The n-type poly-Si layers are 50 nm-thin and grown on textured and planar Cz Si substrates. The samples are annealed from 880 °C to 1000 °C to transform the amorphous Si to poly-crystalline Si. The surface passivation quality is evaluated after the aforementioned anneal step, after an additional hydrogenation step (induced by Al2O3 capping layers and subsequent low temperature anneal), and after firing at 840 °C peak temperature. The optimal surface passivation quality is found for annealing at 960 °C and hydrogenation, resulting in iVoc-values of 710 mV. The hydrogenation step improves the iVoc by ~20 mV depending on the post-deposition annealing temperature. We find that surface passivation and sheet resistance of the poly-Si layers increased with increasing anneal temperature up to 960 °C and starts to decline above 980 °C. This trend is found to correlate with the amount of in-diffused dopants that depends also on the annealing temperature. We show that artificial neural network based model can serve as a fast tool for predicting layer properties that depend on multiple process parameters. The quality of the modelling is the same as that using the Design of Experiment method.
2.
Y Larionova; H Schulte-Huxel; B Min; S Hartmann; M Turcu; T Kluge; H Mehlich; R Brendel; R Peibst
Screen Printed Double-Side Contacted POLO-Cells with Ultra-Thin Poly-Si Layers and Different Transparent Conductive Oxides Proceedings Article
In: WIP, (Hrsg.): Proceedings of the 36th European Photovoltaic Solar Energy Conference and Exhibition, S. 172-175, Marseille, France, 2019, ISBN: 3-936338-60-4.
@inproceedings{Larionova2019b,
title = {Screen Printed Double-Side Contacted POLO-Cells with Ultra-Thin Poly-Si Layers and Different Transparent Conductive Oxides},
author = {Y Larionova and H Schulte-Huxel and B Min and S Hartmann and M Turcu and T Kluge and H Mehlich and R Brendel and R Peibst},
editor = {WIP},
doi = {10.4229/EUPVSEC20192019-2BO.2.6},
isbn = {3-936338-60-4},
year = {2019},
date = {2019-10-23},
booktitle = {Proceedings of the 36th European Photovoltaic Solar Energy Conference and Exhibition},
pages = {172-175},
address = {Marseille, France},
abstract = {In this work we demonstrate various measures to improve the efficiency of large-area screen-printed double-side contacted POLO-cells with different transparent conductive oxides (TCO). We experimentally increase the short-circuit current density Jsc up to 0.6 mA/cm2 by reducing the thickness of poly-Si from 25 nm to 10 nm due to the reduction of the parasitic absorption in the poly-Si layer at the textured cell front side. An implemented hydrogenation step with AlxOy and post-deposition anneal of TCO enable remarkably high implied open-circuit voltage Voc,impl values on n-type cell precursors after the sputtering process. All cell precursors show Voc,impl of up to 740 mV independent of the poly-Si thickness. We find an improvement of the open-circuit voltage Voc of the final cells of up to 728 mV, a cell efficiency of up to 22.3% with indium tin oxide, and a cell efficiency of 21.6% with an aluminum-doped zinc oxide on top or the n+-type POLO layer.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
In this work we demonstrate various measures to improve the efficiency of large-area screen-printed double-side contacted POLO-cells with different transparent conductive oxides (TCO). We experimentally increase the short-circuit current density Jsc up to 0.6 mA/cm2 by reducing the thickness of poly-Si from 25 nm to 10 nm due to the reduction of the parasitic absorption in the poly-Si layer at the textured cell front side. An implemented hydrogenation step with AlxOy and post-deposition anneal of TCO enable remarkably high implied open-circuit voltage Voc,impl values on n-type cell precursors after the sputtering process. All cell precursors show Voc,impl of up to 740 mV independent of the poly-Si thickness. We find an improvement of the open-circuit voltage Voc of the final cells of up to 728 mV, a cell efficiency of up to 22.3% with indium tin oxide, and a cell efficiency of 21.6% with an aluminum-doped zinc oxide on top or the n+-type POLO layer.
3.
Y Larionova; H Schulte-Huxel; B Min; S Hartmann; M Turcu; T Kluge; H Mehlich; R Brendel; R Peibst
Screen Printed Double-Side Contacted POLO-Cells with Ultra-Thin Poly-Si Layers and Different Transparent Conductive Oxides Vortrag
Marseille, France, 10.09.2019, (36th European Photovoltaic Solar Energy Conference and Exhibition).
@misc{Larionova2019,
title = {Screen Printed Double-Side Contacted POLO-Cells with Ultra-Thin Poly-Si Layers and Different Transparent Conductive Oxides},
author = {Y Larionova and H Schulte-Huxel and B Min and S Hartmann and M Turcu and T Kluge and H Mehlich and R Brendel and R Peibst},
year = {2019},
date = {2019-09-10},
address = {Marseille, France},
abstract = {In this work we demonstrate various measures to improve the efficiency of large-area screen-printed double-side contacted POLO-cells with different transparent conductive oxides (TCO). We experimentally increase the short-circuit current density Jsc up to 0.6 mA/cm2 by reducing the thickness of poly-Si from 25 nm to 10 nm due to the reduction of the parasitic absorption in the poly-Si layer at the textured cell front side. An implemented hydrogenation step with AlxOy and post-deposition anneal of TCO enable remarkably high implied open-circuit voltage Voc,impl values on n-type cell precursors after the sputtering process. All cell precursors show Voc,impl of up to 740 mV independent of the poly-Si thickness. We find an improvement of the open-circuit voltage Voc of the final cells of up to 728 mV, a cell efficiency of up to 22.3% with indium tin oxide, and a cell efficiency of 21.6% with an aluminum-doped zinc oxide on top or the n+-type POLO layer.},
note = {36th European Photovoltaic Solar Energy Conference and Exhibition},
keywords = {},
pubstate = {published},
tppubtype = {presentation}
}
In this work we demonstrate various measures to improve the efficiency of large-area screen-printed double-side contacted POLO-cells with different transparent conductive oxides (TCO). We experimentally increase the short-circuit current density Jsc up to 0.6 mA/cm2 by reducing the thickness of poly-Si from 25 nm to 10 nm due to the reduction of the parasitic absorption in the poly-Si layer at the textured cell front side. An implemented hydrogenation step with AlxOy and post-deposition anneal of TCO enable remarkably high implied open-circuit voltage Voc,impl values on n-type cell precursors after the sputtering process. All cell precursors show Voc,impl of up to 740 mV independent of the poly-Si thickness. We find an improvement of the open-circuit voltage Voc of the final cells of up to 728 mV, a cell efficiency of up to 22.3% with indium tin oxide, and a cell efficiency of 21.6% with an aluminum-doped zinc oxide on top or the n+-type POLO layer.
4.
S Bordihn; B Min; R Peibst; R Brendel
Modelling of Passivation and Resistance of n-Type poly-Si Layers by Trained Artificial Neural Networks Vortrag
Marseille, France, 10.09.2019, (36th European Photovoltaic Solar Energy Conference and Exhibition).
@misc{Bordihn2019,
title = {Modelling of Passivation and Resistance of n-Type poly-Si Layers by Trained Artificial Neural Networks},
author = {S Bordihn and B Min and R Peibst and R Brendel},
year = {2019},
date = {2019-09-10},
address = {Marseille, France},
abstract = {This paper studies the passivation quality and sheet resistance of n-type poly-Si on oxide (POLO) layers that we prepare at various post-deposition annealing temperatures. The n-type poly-Si layers are 50 nm-thin and grown on textured and planar Cz Si substrates. The samples are annealed from 880 °C to 1000 °C to transform the amorphous Si to poly-crystalline Si. The surface passivation quality is evaluated after the aforementioned anneal step, after an additional hydrogenation step (induced by Al2O3 capping layers and subsequent low temperature anneal), and after firing at 840 °C peak temperature. The optimal surface passivation quality is found for annealing at 960 °C and hydrogenation, resulting in iVoc-values of 710 mV. The hydrogenation step improves the iVoc by ~20 mV depending on the post-deposition annealing temperature. We find that surface passivation and sheet resistance of the poly-Si layers increased with increasing anneal temperature up to 960 °C and starts to decline above 980 °C. This trend is found to correlate with the amount of in-diffused dopants that depends also on the annealing temperature. We show that artificial neural network based model can serve as a fast tool for predicting layer properties that depend on multiple process parameters. The quality of the modelling is the same as that using the Design of Experiment method.},
note = {36th European Photovoltaic Solar Energy Conference and Exhibition},
keywords = {},
pubstate = {published},
tppubtype = {presentation}
}
This paper studies the passivation quality and sheet resistance of n-type poly-Si on oxide (POLO) layers that we prepare at various post-deposition annealing temperatures. The n-type poly-Si layers are 50 nm-thin and grown on textured and planar Cz Si substrates. The samples are annealed from 880 °C to 1000 °C to transform the amorphous Si to poly-crystalline Si. The surface passivation quality is evaluated after the aforementioned anneal step, after an additional hydrogenation step (induced by Al2O3 capping layers and subsequent low temperature anneal), and after firing at 840 °C peak temperature. The optimal surface passivation quality is found for annealing at 960 °C and hydrogenation, resulting in iVoc-values of 710 mV. The hydrogenation step improves the iVoc by ~20 mV depending on the post-deposition annealing temperature. We find that surface passivation and sheet resistance of the poly-Si layers increased with increasing anneal temperature up to 960 °C and starts to decline above 980 °C. This trend is found to correlate with the amount of in-diffused dopants that depends also on the annealing temperature. We show that artificial neural network based model can serve as a fast tool for predicting layer properties that depend on multiple process parameters. The quality of the modelling is the same as that using the Design of Experiment method.
5.
R Peibst; Y Larionova; S Reiter N Orlowski; S Schäfer; M Turcu; B Min; R Brendel; D Tetzlaff; J Krügener; T Wietler; U Höhne; J-D Kähler; H Mehlich; S Frigge
Industrial, Screen-Printed Double-Side Contacted Polo Cells Proceedings Article
In: WIP, (Hrsg.): Proceedings of the 33rd European Photovoltaic Solar Energy Conference and Exhibition, S. 451-454, Amsterdam, The Netherlands, 2017, ISBN: 3-936338-47-7.
@inproceedings{Peibst2017,
title = {Industrial, Screen-Printed Double-Side Contacted Polo Cells},
author = {R Peibst and Y Larionova and S Reiter N Orlowski and S Schäfer and M Turcu and B Min and R Brendel and D Tetzlaff and J Krügener and T Wietler and U Höhne and J-D Kähler and H Mehlich and S Frigge},
editor = {WIP},
doi = {10.4229/EUPVSEC20172017-2DO.2.2},
isbn = {3-936338-47-7},
year = {2017},
date = {2017-09-28},
booktitle = {Proceedings of the 33rd European Photovoltaic Solar Energy Conference and Exhibition},
pages = {451-454},
address = {Amsterdam, The Netherlands},
abstract = {We demonstrate an industrial double-side-contacted, screen-printed large area cell with POLO junctions on both sides and an in-house-measured energy conversion efficiency of 22.3 % (A = 244.15 cm2},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
We demonstrate an industrial double-side-contacted, screen-printed large area cell with POLO junctions on both sides and an in-house-measured energy conversion efficiency of 22.3 % (A = 244.15 cm2
6.
R Peibst; Y Larionova; S Reiter; M Turcu; R Brendel; D Tetzlaff; J Krügener; T Wietler; U Höhne; J -D Kähler; H Mehlich; S Frigge
Implementation of n+ and p+ poly junctions on front and rear side of double-side-contacted industrial silicon solar cells Proceedings Article
In: WIP, (Hrsg.): Proceedings of the 32nd European Photovoltaic Solar Energy Conference, S. 323-327, Munich, Germany, 2016, ISBN: 3-936338-41-8.
@inproceedings{Peibst2016,
title = {Implementation of n+ and p+ poly junctions on front and rear side of double-side-contacted industrial silicon solar cells},
author = {R Peibst and Y Larionova and S Reiter and M Turcu and R Brendel and D Tetzlaff and J Krügener and T Wietler and U Höhne and J -D Kähler and H Mehlich and S Frigge},
editor = {WIP},
doi = {10.4229/EUPVSEC20162016-2BO.3.2},
isbn = {3-936338-41-8},
year = {2016},
date = {2016-09-01},
booktitle = {Proceedings of the 32nd European Photovoltaic Solar Energy Conference},
journal = {Proceedings of the 32nd European Photovoltaic Solar Energy Conference},
pages = {323-327},
address = {Munich, Germany},
abstract = {We present building blocks for double-side contacted cells with poly-Si on passivating interfacial oxides (POLO) junctions for both polarities, fabricated by a lean process flow. For this purpose, we evaluate p+ and n+ POLO junctions utilizing ~1.7 nm thin wet chemically grown (ozone diluted in di-ionized water) and ozone grown interfacial oxides on different surface morphologies. We achieve excellent passivation quality on damaged etched (100) surfaces with record low J0 values of 0.6 fA/cm2 (implied open circuit voltage Voc,impl 748 mV) for n+ POLO junctions and of 5 fA/cm2 (Voc,impl 729 mV) for p+ POLO junctions. However, on alkaline textured surfaces, ~6 times higher J0 values are obtained. We compare ex-situ-doped poly-Si (intrinsically deposited and subsequently ion implanted) with in-situ-doped poly-Si layers. For POLO junctions formed on textured surfaces by utilizing wet chemical oxides and low-pressure chemical vapor deposition (LP-CVD) of 20 nm in-situ n+-doped poly-Si, we obtain J0 values down to 2.4 fA/cm2. Also with plasma-enhanced chemical vapor deposition (PE-CVD) of in-situ-doped amorphous Si and subsequent crystallization, we obtain comparable results. A transparent conductive oxide (TCO), preferably temperature stable, seems to be required to support the limited lateral conductivity of POLO junctions with poly-Si layer thicknesses ≤ 20 nm. We find that the conductivity of indium tin oxide (ITO) strongly decreases upon firing, while the initial conductivity can be maintained even for firing temperatures of 800°C when capping the ITO with a thin SiNx layer. Our recent cell precursors (156 mm 156 mm Cz n-type wafers with an n+ POLO junction on an alkaline textured front-side and a p+ POLO junction on a damage-etched rear-side) exhibit a promising Voc,impl value of 732 mV, and a total J0 value of the doped surfaces of 12 fA/cm2. In combination with the high pseudo fill factor of 85.3 % and with a short-circuit current density of 40 mA/cm2 as calculated by ray tracing simulations, the corresponding pseudo efficiency is 25.0 %.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
We present building blocks for double-side contacted cells with poly-Si on passivating interfacial oxides (POLO) junctions for both polarities, fabricated by a lean process flow. For this purpose, we evaluate p+ and n+ POLO junctions utilizing ~1.7 nm thin wet chemically grown (ozone diluted in di-ionized water) and ozone grown interfacial oxides on different surface morphologies. We achieve excellent passivation quality on damaged etched (100) surfaces with record low J0 values of 0.6 fA/cm2 (implied open circuit voltage Voc,impl 748 mV) for n+ POLO junctions and of 5 fA/cm2 (Voc,impl 729 mV) for p+ POLO junctions. However, on alkaline textured surfaces, ~6 times higher J0 values are obtained. We compare ex-situ-doped poly-Si (intrinsically deposited and subsequently ion implanted) with in-situ-doped poly-Si layers. For POLO junctions formed on textured surfaces by utilizing wet chemical oxides and low-pressure chemical vapor deposition (LP-CVD) of 20 nm in-situ n+-doped poly-Si, we obtain J0 values down to 2.4 fA/cm2. Also with plasma-enhanced chemical vapor deposition (PE-CVD) of in-situ-doped amorphous Si and subsequent crystallization, we obtain comparable results. A transparent conductive oxide (TCO), preferably temperature stable, seems to be required to support the limited lateral conductivity of POLO junctions with poly-Si layer thicknesses ≤ 20 nm. We find that the conductivity of indium tin oxide (ITO) strongly decreases upon firing, while the initial conductivity can be maintained even for firing temperatures of 800°C when capping the ITO with a thin SiNx layer. Our recent cell precursors (156 mm 156 mm Cz n-type wafers with an n+ POLO junction on an alkaline textured front-side and a p+ POLO junction on a damage-etched rear-side) exhibit a promising Voc,impl value of 732 mV, and a total J0 value of the doped surfaces of 12 fA/cm2. In combination with the high pseudo fill factor of 85.3 % and with a short-circuit current density of 40 mA/cm2 as calculated by ray tracing simulations, the corresponding pseudo efficiency is 25.0 %.
7.
Y Larionova; R Peibst; M Turcu; S Reiter; R Brendel; D Tetzlaff; J Krügener; T Wietler; U Höhne; J -D Kähler
Optimization of p+ poly-Si/c-Si junctions on wet-chemically grown interfacial oxides and on different wafer morphologies Proceedings Article
In: WIP, (Hrsg.): Proceedings of the 32nd European Photovoltaic Solar Energy Conference, S. 452-455, Munich, Germany, 2016, ISBN: 3-936338-41-8.
@inproceedings{Larionova2016,
title = {Optimization of p+ poly-Si/c-Si junctions on wet-chemically grown interfacial oxides and on different wafer morphologies},
author = {Y Larionova and R Peibst and M Turcu and S Reiter and R Brendel and D Tetzlaff and J Krügener and T Wietler and U Höhne and J -D Kähler},
editor = {WIP},
doi = {10.4229/EUPVSEC20162016-2CO.4.3},
isbn = {3-936338-41-8},
year = {2016},
date = {2016-09-01},
booktitle = {Proceedings of the 32nd European Photovoltaic Solar Energy Conference},
journal = {Proceedings of the 32nd European Photovoltaic Solar Energy Conference},
pages = {452-455},
address = {Munich, Germany},
abstract = {In this paper, we study the passivation quality of p-type poly-Si / c-Si junctions annealed at different temperatures. We evaluate wet-chemically grown (ozonized in DI-H2O) and thermally-grown interfacial oxides and compare boron ion implantation into intrinsic poly-Si with different doses to in situ p+ doping during the LPCVD Si deposition process. The experimental results show that decreasing the doping concentration of the p+ poly-Si layer and increasing the annealing temperature improve the passivation quality of the p+ poly-Si / c-Si junctions. Additionally, we explore the passivation quality of p-type poly-Si / c-Si junctions on different surface morphologies and orientations, i.e. on planar (100) and (111) as well as alkaline textured Si surfaces. Textured surfaces show a strongly increased J0e, possibly due to a worse p-type poly-Si passivation on (111) surfaces. The emitter saturation current density J0e of 8 fA/cm² achieved on planar (100) surfaces is the lowest value reported for p+ poly-Si / c-Si junctions with wet-chemically grown oxides so far.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
In this paper, we study the passivation quality of p-type poly-Si / c-Si junctions annealed at different temperatures. We evaluate wet-chemically grown (ozonized in DI-H2O) and thermally-grown interfacial oxides and compare boron ion implantation into intrinsic poly-Si with different doses to in situ p+ doping during the LPCVD Si deposition process. The experimental results show that decreasing the doping concentration of the p+ poly-Si layer and increasing the annealing temperature improve the passivation quality of the p+ poly-Si / c-Si junctions. Additionally, we explore the passivation quality of p-type poly-Si / c-Si junctions on different surface morphologies and orientations, i.e. on planar (100) and (111) as well as alkaline textured Si surfaces. Textured surfaces show a strongly increased J0e, possibly due to a worse p-type poly-Si passivation on (111) surfaces. The emitter saturation current density J0e of 8 fA/cm² achieved on planar (100) surfaces is the lowest value reported for p+ poly-Si / c-Si junctions with wet-chemically grown oxides so far.