@misc{Kafedjiska2024,

title = {European PV Manufacturing and LCOE: Ensuring Resilience and Competitiveness Through R&I and Industrial Policies},

author = {I Kafedjiska and C Breyer and C Busto and N Cherradi and P Fath and B Lim and D Moser and R Preu and E Roman and R Schlatmann and M Topič and J Trube and E Vartiainen},

year  = {2024},

date = {2024-09-27},

address = {Vienna, Austria},

abstract = {The European Solar PV Industry Alliance (ESIA) aims to reach 30 GW of annual solar PV manufacturing capacity in Europe by 2025 [1] and to make the PV module supply more “resilient”. Currently, Europe depends almost entirely on PV module imports from one country (China) or from regions which in turn rely on silicon wafer supply from China [2]. PV Magazine estimates that this corresponds to subsidies ranging from 600 to 900 million €/year in 2025, and from 3.7 to 5.6 billion €/year in 2030, assuming a 10-15 €ct/Wp cost gap between EU-made modules and inverters and the global competition [3]. To explore the question of resilience even further, the European Technology and Innovation Platform for Photovoltaic (ETIP-PV) analysed the Cost of Ownership (CoO) for a 10 GW integrated PV manufacturing factory for three PV technologies (TOPCon, HJT, or IBC) and four locations (China, India, USA, and the EU) [4]. For China and the EU two electricity prices were considered: low (3 and 7 €ct/kWh, respectively) and high (8.5 and 12 €ct/kWh, respectively). China (low) produces at 16 $ct/Wp (TOPCon and IBC) and 17 $ct/Wp (HJT). China (high) and India have a 19 – 21 $ct/Wp for all technologies. EU (low) has a 24 – 25 $ct/Wp, while EU (high) has around 30 $ct/Wp. The USA has around 28 – 29 $ct/Wp for all technologies. The cost variations are present due to different material, labour, equipment, and building costs – all of which are higher in the EU and the USA than in China and India [4]. Additionally, it should be mentioned that latest spot market factory gate prices in China for PERC and N-type mono-crystalline Si modules are 10.6 and 11.4 $ct/Wp, respectively [5]. Thus, 16 $ct/Wp for TOPCon/IBC manufacturing are not reflective of the real cost of the Chinese players, even though the current market cost is likely below the average manufacturing cost. Next, ETIP-PV performed LCOE calculations for varying Weighted Average Cost of Capital (WACC) for residential (5 kWp) PV systems (WACC = 0, 2, 4, or 6%), commercial (50 kWp), industrial (10 MWp), and utility-scale (100 MWp) PV systems (WACC = 2, 4, 7, or 10%) for five different locations in Europe: Helsinki, Munich, Toulouse, Rome, and Malaga. Compared with the average variable retail electricity prices, even excluding the fixed fees which cannot be saved by own PV consumption, PV electricity is already cheaper in all five locations with realistic WACC rates and consumer segments [6]. However, the above-mentioned LCOE calculations did not distinguish between Chinese or EU-manufactured PV modules. Therefore, the question whether the EU-manufactured PV modules on European markets can be LCOE-competitive with the Chinese-manufactured PV modules remains open. Initial calculations indicate that even though the EU-manufacturing costs are higher, they can have little to no effect on the LCOE and the end-user costs, especially if suitable policy incentives and investments are put into place. For instance, a price difference between European and Chinese modules of 10 €ct/Wp (e.g. 20 vs. 10 €ct/Wp) would lead to a 3.8 €/MWh (~13%) LCOE difference in Malaga (annual yield of 1790 kWh/kWp) and 6.5 €/MWh (~14%) in Helsinki (annual yield of 1050 kWh/kWp) in a utility-scale system with a nominal WACC 7%, inflation 2%, degradation 0.5%/a, 30 years lifetime and 12.5 €/kWp/a OPEX. For rooftop systems, this difference is almost insignificant and even in utility-scale in Southern Europe not decisive. However, in the Nordics, the utility-scale LCOE value difference of more than 6 €/MWh can be significant. One of the key challenges for policy makers is how to find a balance between the need of rapid scale-up of manufacturing capacity and renewable-energy deployment vs. the need to sustain competitiveness through R&I. Therefore, the final part of the talk will cover industrial policies and R&I efforts that can further decrease this LCOE difference and make the European PV manufacturing significantly more resilient, price competitive, and end-user friendly. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Schulte-Huxel2024c,

title = {Fully Integrated and System-Optimized Electronic Solutions on Solar Modules },

author = {H Schulte-Huxel and T Manthey and T Brinker and P Ranft and H Woock and T Hahn and L Moerlein and S Blankemeyer and A Skorcz and M Köntges and D Manteuffel and J Friebe},

year  = {2024},

date = {2024-09-27},

address = {Vienna, Austria},

abstract = {Alternating current PV modules offer various advantages such as easier installation, safer operation and increased efficiency for residential and building-integrated PV systems including small balcony power plants. Although there is a growing market for module level electronics, there are still only limited solutions available. Here, we present the combination of different innovations to raise the potential of simplification and synergies by fully integration of the power electronics into the PV module. We developed a novel, highly efficient and compact power electronics with galvanic isolation offering a fully reactive power-capable inverter topology, utilizing 650 V gallium nitride (GaN) power semiconductors. The communication is enabled by wireless communication based on Wirepas mesh connectivity, allowing a safe and robust operation and flexible expansion of the PV system. The module electronics are connected directly to the cross-connectors of the PV modules, allowing for novel circuit configurations in contrast to conventional bypass diodes that have shown to be a cost-effective approach of limiting the operating range of each substring to prevent hot spot events on the module without significant yield losses. Furthermore, a slot antenna is introduced into the cross connectors of the PV module. The antenna is capacitively fed (through the backsheet) by an aperture coupling printed circuit board (PCB) on the rear side of the module. The fully integrated electronics is attached to the PV module, encapsulated and electrically isolated from the environment by low-pressure molding, which has shown high reliability in accelerated aging tests. We will show experimental results on test structures and finished PV modules being installed on an outdoor test stand. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Hu2024b,

title = {Triple-Junction Perovskite-Perovskite-Silicon Photovoltaics},

author = {H Hu and S X An and Y Li and S Orooji and R Singh and F Schackmar and F Laufer and Q Jin and T Feeney and A Diercks and F Gota and S Moghadamzadeh and T Pan and M Rienäcker and R Peibst and P Fassl and B Abdollahi Nejand and U W Paetzold},

year  = {2024},

date = {2024-09-25},

address = {Vienna, Austria},

abstract = {Over the past decade, metal halide perovskite semiconductors emerged as the prime candidate materials for next generation high-efficiency multi-junction photovoltaics (PVs). The recent remarkable advancements in monolithic perovskite-based double-junction solar cells (i.e., perovskite/CIGS or perovskite/Si tandem PV) denote just the beginning of a new era in multi-junction PVs. However, to date, the performance of triple-junction PV architectures, such as perovskite–perovskite–silicon architecture, lags considerably behind, with only a limited number of reports on prototypes. In this contribution, we present triple-junction perovskite–perovskite–silicon solar cells, achieving a power conversion efficiency of 24.4%. Achieving such high performances in triple-junction perovskite–perovskite–Si solar cells requires addressing several challenges. These include (1) the sequential processing of high-quality perovskite thin films within the progressively complicated multi-layer architecture, (2) light management to ensure efficient absorption and utilization of sunlight, (3) current matching among the monolithically interconnected sub-cells, as well as (4) the development of low-loss tunnel/recombination junctions for efficient charge transport across the junction. Overcoming these challenges is essential for realizing the full potential of triple-junction perovskite–perovskite–Si solar cells and pushing the boundaries of ultra-high-efficiency PV technologies. A significant challenge in processing triple junctions to date is the most critical junction, the middle perovskite sub-cell. This sub-cell is processed on top of the silicon bottom cell and must withstand the subsequent processing of the wide-bandgap perovskite top cell. In this study, we show that by optimizing the light management for each perovskite sub-cell (with bandgaps of ~1.84 eV and ~1.52 eV for the top and middle cells, respectively), we maximize the current generation to 11.6 mA cm–2. The key to this achievement is the development of a high-performance middle perovskite sub-cell, utilizing a stable pure-α-phase formamidinium lead iodide perovskite thin film that is free of wrinkles, cracks, and pinholes. This enables a high open-circuit voltage of 2.84 V in the triple-junction architecture. Notably, non-encapsulated triple-junction devices retain up to 96.6% of their initial efficiency when stored in the dark at 85°C for 1081 hours. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Schmidt2024b,

title = {Excellent Passivation of Silicon Surfaces by HfO2 Layers Deposited Using Scalable Spatial Atomic Layer Deposition},

author = {J Schmidt and M Winter and F Souren and J Bolding and H de Vries},

year  = {2024},

date = {2024-09-25},

address = {Vienna, Austria},

abstract = {Spatial Atomic Layer Deposition (SALD) had been successfully applied in the past for the Al2O3 surface passivation on silicon solar cells. In contrast to conventional sequential ALD techniques, as typically used in the labs, SALD allows for high deposition rates of a few nm per second, which are compatible with industrial solar cell production. In this contribution, we apply SALD for the first time to the electronic passivation of moderately doped (~1016 cm–3) p-type crystalline silicon surfaces with thin layers of hafnium oxide (HfO2). For 10 nm thick HfO2 layers annealed at 400°C in air, an effective surface recombination velocity Seff of only 4 cm/s is achieved, which is below what has been reported before using sequential ALD techniques. The one-sun implied open-circuit voltage amounts to iVoc = 727 mV. Firing is shown to reduce the passivation quality, however, by adding a capping layer of plasmaenhanced-chemical-vapor-deposited hydrogen-rich silicon nitride (SiNx) onto the HfO2, the firing stability is found to improve. The presented study demonstrates that SALD-deposited HfO2 layers and HfO2/SiNx stacks have the potential to evolve into an attractive surface passivation scheme for future silicon solar cells. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Wirtz2024b,

title = {Implementing Strain Relief for Improved Reliability of BIPV Modules Built on Aluminum Facade Elements},

author = {W Wirtz and K Meyer and S Blankemeyer and T Daschinger and H Schulte-Huxel},

year  = {2024},

date = {2024-09-24},

address = {Vienna, Austria},

abstract = {Integration of photovoltaic (PV) modules into building façades comes along with new available areas for PV, product diversity and challenges regarding their production and reliability due to new combinations of materials. Here, we investigate for example the combination of PV modules with aluminum on their rear side. Aluminum is a common material in the building industry and therefore interesting for adopting in building-integrated PV (BIPV). A big challenge is the combination of materials, e.g., glass, polymer sheet, silicon, copper and aluminum, with differing thermal expansion coefficients, which induces stresses under variation in temperature. Due to these stresses, the copper wires interconnecting the solar cells are ripped off from the cells or break under operating conditions with repeated temperature changes. As a consequence, the lifetime of BIPV modules with aluminum sheets on the rear side can be drastically reduced compared to standard PV modules. In this work, a new approach to reduce the thermal stress in the cell interconnectors and to prevent them from ripping off is presented. This method uses horizontal crimps in interconnection wires between two cells as strain relief. We produced several PV modules with aluminum sheets as rear covers to show the potential of the horizontal crimps. Industrial PERC solar cells are interconnected with and without crimps and stressed in thermal cycling. The ageing experiments show the longer lifetime of modules with crimped wires compared to modules with straight interconnection wires. The power degradation is slowed down by a factor of four until 400 temperature cycles. This is shown for modules containing strings out of three and ten M6 half cells, respectively, where the ten-half-cell strings degraded much faster due to higher induced stresses. Electroluminescence (EL) images support the current-voltage (IV) measurements and show that the cell interconnectors without a horizontal crimp gradually loose contact to the cells. Furthermore, the influence of having a front glass or polymer frontsheet on the stability during thermal cycling is investigated. When using a front glass, the power degradation is considerably slower than when using a polymer front sheet. In conclusion, a horizontal crimp in each interconnection wire increases the module lifetime in comparison to a straight wire interconnection and counteracts ripping off or fatigue breakage of copper wires in BIPV modules built on aluminum façade elements. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Hoffmann2024b,

title = {Self-Aligned Phase Separation for IBC Cells Using PVD Polysilicon},

author = {E Hoffmann and G Gregory and M Centazzo and M Khan and N Khan and V Mertens and S Spätlich and U Baumann and T Dullweber},

year  = {2024},

date = {2024-09-24},

address = {Vienna, Austria},

abstract = {We introduce an innovative IBC solar cell process leveraging the directional deposition nature of doped polycrystalline silicon (poly-Si) through physical vapor deposition (PVD). This method enables the self-alignment of passivated contacts, effectively separating the polarities. The self-aligned back contact (SABC) cell incorporates n-type and p-type passivated contacts, achieved through interfacial oxide (SiOX) and doped n- and p-type poly-Si layers respectively, arranged in an interdigitated design on the back side. The insulation between the p-type and n-type poly-Si layers requires only a single structuring process of the firstly deposited p-type poly-Si. The subsequent blanket deposition of n-type poly-Si by PVD remains insulated from the p-type poly-Si layer due to the self-alignment properties inherent in our structuring and deposition processes. The SABC target process sequence can be implemented into existing TOPCon manufacturing lines requiring only two additional processing tools. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Buchholz2024,

title = {IBC4EU: First Results of Industrialization of Low Cost, High Efficiency IBC Technology},

author = {F Buchholz and D Tune and T Messmer and J Linke and M Prasad and J Ulbikas and A Dahle and M Meereboer and F Fabris and E Eikelboom and T Borgers and R Van Dyk and H Sivaramakrishnan and S Harrison and J Kester and J Kroon and V Mertens and T Dullweber and O Shochet and I Rosen and I Röver and W Palitzsch and Y Zaror and J Stierstorfer and A Radzevicius and P Lukinskas and J Denafas and T Vanhanen and T Savisalo and M Pospischil and M Breitenbücher and Ö Coşkun and M de l'Epine and P Macé},

year  = {2024},

date = {2024-09-24},

address = {Vienna, Austria},

abstract = {This paper introduces the Horizon Europe project IBC4EU with the goal to establish a European value chain based on innovative passivated contact back contact solar cells and modules. The two key solar cell technologies – POLO-IBC and polyZEBRA – are introduced. We present simulation studies and experiments on the suitability of bulk resistance ranges for use in the two solar cell concepts indicating best solar cell efficiencies for similarly low resistance values as standard TOPCon solar cells. The higher the minority carrier lifetime of the given material, the smaller this impact becomes. The p-type based solar cell (POLO-IBC) shows to require a more confined range that is slightly higher in sheet resistance than the standard PERC requirements. Reliability data on the cells (LeTID) and modules (DH, TC) proves the excellent long-term stability of the n-typed back contact cells and modules. In addition, an innovative way to interconnect the IBC cells based on printed conductive patterns printed on glass is introduced as well as a novel recycling route for state-of-the-art back contact solar cells.},

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Meyer2024,

title = {Bending of Building-Integrated PV (BIPV) Modules Based on Aluminum under Changing Temperature Conditions},

author = {K Meyer and W Wirtz and S Blankemeyer and D Lorenz and F Klopp and H Schulte-Huxel},

year  = {2024},

date = {2024-09-24},

address = {Vienna, Austria},

abstract = {Widespread integration of photovoltaics (PV) into surfaces that are so far not used for electrical power production ask for new designs and structures of PV modules. This comes along with challenges concerning their production [1, 2]. Aluminum is a common material in building industry and is so interesting for a use in building-integrated PV (BIPV) modules for façades. A big challenge with aluminum as rear cover of BIPV modules is the bending of the module after lamination due to the different thermal expansion coefficients of aluminum and glass. The glass is typically used as hail proof front cover. The bending of a module can be up to 5 cm using a 0.3 mm thick aluminum backsheet [3]. (i) First, we optimize the lamination process in order to minimize the bending and to investigate the dependence of the bending on and its initiation in the cooling process. The reference module has a front glass of 2 mm and an aluminum sheet of 1 mm on the rear side. A sunny-side up lamination resulted in a bending of 2.8 cm at room temperature. The starting point for the bending to show during cooling was around 80 °C. The bending was considerably reduced by active cooling of the module to 20 °C in the laminator under pressure of 1 bar from above resulting in a maximum bending of 1.2 cm. (ii) In the second part, we analyzed the bending of BIPV modules laminated on differently shaped aluminum sheets with a size of 130 x 25 x 0.1 cm³. We also replaced the lamination process by gluing modules on aluminum with an adhesive. Bending at room temperature is avoided by either gluing the modules or using square-shaped structures on both sides of the aluminum sheet (s. Fig. 1). (iii) Third, we investigated the influence of changing operating temperature conditions on the bending of the BIPV modules. Therefore, all samples were tested in a temperature range between -40 °C and +85 °C while the bending is monitored. At 85 °C, all samples had zero bending. At -40 °C, the modules are more bent than at room temperature independent of the modules being laminated or glued. A maximum bending of 7 cm is observed with the reference module, which means a five times higher bending compared to room temperature. The modules with a square-shaped design structure showed no bending even at -40 °C, independent of being laminated or glued. This adjusted module design probably improves long-term stability of BIPV modules with aluminum. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Dullweber2024,

title = {Optimized Ga-Doped Cz Wafers for POLO IBC Solar Cells with High Efficiency and Minimal LeTID Degradation},

author = {T Dullweber and V Mertens and M Winter and S Schimanke and S Dorn and Y Larionova and J Schmidt and R Brendel and A K Dahle},

year  = {2024},

date = {2024-09-23},

address = {Vienna, Austria},

abstract = {The PV industry is using 0.4 to 0.8 Ωcm low-resistivity Ga-doped Cz wafers with carrier lifetimes < 700 µs for mass production of PERC and bifacial PERC+ cells. However, for our next-generation high-efficiency POLO IBC solar cells [1] Quokka3 simulations predict that higher Ga Cz wafer resistivities of 1.5 Ωcm with higher carrier lifetime will boost Voc and Jsc and increase the POLO IBC solar cell efficiency by 0.5%abs. up to 24.6%. Hence, in this abstract we investigate for the first time higher Ga-doped Cz wafer resistivities ranging from 0.7 to 4.6 Ωcm from a Cz ingot supplied by NorSun achieving carrier lifetimes up to 3 ms for application to POLO IBC solar cells processed at ISFH. The resulting POLO IBC solar cell (see schematics in Fig. 2) precursors without metal contacts exhibit excellent implied Voc (iVoc) values around 740 mV after processing over the whole wafer resistivity range with a best value of 745 mV at 2 Ωcm. Light soaking at 0.5 suns, 53°C, increases the iVoc by 3 mV corresponding to a low Fe concentration of 1.6×1010 cm-3 in the Ga wafers. We subject the POLO IBC iVoc samples to LeTID degradation conditions at 1 sun, 80°C, and measure a stable and high iVoc around 740 mV up to 10 hours of degradation time as shown in Fig. 1. The starting iVoc degradation towards 100 hours is caused by an increased J0 of the AlOx/SiN or SiOxNy/n-poly Si surface passivation which is subject to further investigation. Currently, we are processing full POLO IBC solar cells with different Ga wafer resistivities. The resulting IV parameters and LeTID properties will be presented at the EUPVSEC conference as well. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Min2024c,

title = {Wet-Chemically Grown Interfacial Oxide for Passivating Contacts Fabricated with an Industrial Inline Processing System},

author = {B Min and P Noack and B Wattenberg and T Dippell and H Schulte-Huxel and R Peibst and R Brendel},

year  = {2024},

date = {2024-09-23},

urldate = {2024-09-23},

address = {Vienna, Austria},

abstract = {Passivating polysilicon on oxide (POLO) contacts are contributing significantly to increase the efficiency of industrial silicon solar cells towards 26 %. The current mass production applies mostly in-situ grown thermal interfacial oxides before the deposition of poly-Si in the low-pressure chemical vapor deposition (LPCVD) furnace. In contrast, wet-chemically grown interfacial oxides are an attractive alternative with potentially lower process costs and energy consumption. An inline system allows a particularly lean process flow. In this work, we present for the first time the application of wet-chemical interfacial oxide from an industrial inline processing system for poly-Si based passivating contacts. An excellent passivation quality is achieved by creating an interfacial oxide with very short exposure time of 90 s in ozonized water and by adjusting the annealing temperature in a tube furnace. The resulting surface recombination current density is 1.2 fA/cm2 after a hydrogenation step. This wet-chemical interfacial oxide is successfully implemented into POLO back junction solar cells on large area gallium-doped M2-sized p-type silicon wafers featuring a P-doped poly-Si based passivating contact at the rear side. The best cell has an efficiency of 23.6 % and an open-circuit voltage of 719 mV, independently confirmed by ISFH CalTeC. Our cost calculation shows a saving of up to 17.2 % in CAPEX, 5.2 % p.a. in OPEX and 9.0 % in the footprint if the interfacial oxide is formed by an inline wet-chemical processing system rather than in a plasma chamber. },

note = {41st European Photovoltaic Solar Energy Conference and Exhibition},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}

@misc{Albrecht2024,

title = {Entwicklung eines Mehrfamilienhaus-Emulators für die Prüfung von Wohnungsstationen},

author = {K Albrecht},

year  = {2024},

date = {2024-09-20},

address = {Hamburg, Germany},

note = {2. Konferenz der Norddeutschen Wärmeforschung},

keywords = {},

pubstate = {published},

tppubtype = {presentation}

}